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» Incremental formal design verification
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ATVA
2007
Springer
134views Hardware» more  ATVA 2007»
13 years 11 months ago
Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
Moonzoo Kim
IEEEPACT
2007
IEEE
14 years 1 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
CAV
1994
Springer
111views Hardware» more  CAV 1994»
13 years 11 months ago
Automatic Verification of Timed Circuits
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
Tomas Rokicki, Chris J. Myers
FMCAD
2007
Springer
13 years 11 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...
ISICT
2003
13 years 8 months ago
On the automated implementation of modal logics used to verify security protocols
: Formal verification provides a rigid and thorough means of evaluating the correctness of cryptographic protocols so that even subtle defects can be identified. As the application...
Tom Coffey, Reiner Dojen, Tomas Flanagan