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» Incremental formal design verification
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DAC
1997
ACM
13 years 11 months ago
Formal Verification of FIRE: A Case Study
We present our experiences with the formal verification of an automotive chip used to control the safety features in a car. We used a BDD based model checker in our work. We descr...
Jae-Young Jang, Shaz Qadeer, Matt Kaufmann, Carl P...
FMCAD
2006
Springer
13 years 11 months ago
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning
Pervasive Logic is a broad term applied to the variety of logic present in hardware designs, yet not a part of their primary functionality. Examples of pervasive logic include init...
Tilman Glökler, Jason Baumgartner, Devi Shanm...
BIRTHDAY
2007
Springer
13 years 11 months ago
Automating Verification of Cooperation, Control, and Design in Traffic Applications
We present a verification methodology for cooperating traffic agents covering analysis of cooperation strategies, realization of strategies through control, and implementation of c...
Werner Damm, Alfred Mikschl, Jens Oehlerking, Erns...
DAC
1996
ACM
13 years 11 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
CORR
2010
Springer
176views Education» more  CORR 2010»
13 years 7 months ago
Bus Protocols: MSC-Based Specifications and Translation into Program of Verification Tool for Formal Verification
Message Sequence Charts (MSCs) are an appealing visual formalism mainly used in the early stages of system design to capture the system requirements. However, if we move towards a...
Kamrul Hasan Talukder