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» Incremental logic rectification
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POPL
1992
ACM
13 years 11 months ago
Abstract Semantics for a Higher-Order Functional Language with Logic Variables
Semantics for a Higher-Order Functional Language with Logic Variables Radha Jagadeesan Imperial College, London, UK SW7 2BZ. Keshav Pingali Cornell University, Ithaca, NY 14853. A...
Radha Jagadeesan, Keshav Pingali
FORMATS
2007
Springer
14 years 1 months ago
AMT: A Property-Based Monitoring Tool for Analog Systems
Abstract. In this paper we describe AMT, a tool for monitoring temporal properties of continuous signals. We first introduce STL/PSL, a specification formalism based on the indus...
Dejan Nickovic, Oded Maler
ICLP
2001
Springer
14 years 2 days ago
PALS: An Or-Parallel Implementation of Prolog on Beowulf Architectures
This paper describes the development of the PALS system, an implementation of Prolog that efficiently exploits or-parallelism on share-nothing platforms. PALS makes use of a novel ...
Karen Villaverde, Enrico Pontelli, Hai-Feng Guo, G...
DATE
2008
IEEE
157views Hardware» more  DATE 2008»
14 years 2 months ago
Logical Reliability of Interacting Real-Time Tasks
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that chec...
Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. H...
AHS
2006
IEEE
138views Hardware» more  AHS 2006»
14 years 1 months ago
Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures
Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has sh...
Emanuele Stomeo, Tatiana Kalganova, Cyrille Lamber...