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CCS
2010
ACM
13 years 7 months ago
Attacks and design of image recognition CAPTCHAs
We systematically study the design of image recognition CAPTCHAs (IRCs) in this paper. We first review and examine all IRCs schemes known to us and evaluate each scheme against th...
Bin B. Zhu, Jeff Yan, Qiujie Li, Chao Yang, Jia Li...
HPCA
2008
IEEE
14 years 8 months ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
14 years 1 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
SYNASC
2005
IEEE
86views Algorithms» more  SYNASC 2005»
14 years 1 months ago
One and Two Polarizations, Membrane Creation and Objects Complexity in P Systems
We improve, by using register machines, some existing universality results for specific models of P systems. P systems with membrane creation are known to generate all recursivel...
Artiom Alhazov, Rudolf Freund, Agustin Riscos-N&ua...