Sciweavers

74 search results - page 6 / 15
» Infinite Time Register Machines
Sort
View
ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
14 years 27 days ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
ICML
2005
IEEE
14 years 8 months ago
Finite time bounds for sampling based fitted value iteration
In this paper we consider sampling based fitted value iteration for discounted, large (possibly infinite) state space, finite action Markovian Decision Problems where only a gener...
Csaba Szepesvári, Rémi Munos
FOSSACS
2006
Springer
13 years 11 months ago
On Metric Temporal Logic and Faulty Turing Machines
Metric Temporal Logic (MTL) is a real-time extension of Linear Temporal Logic that was proposed fifteen years ago and has since been extensively studied. Since the early 1990s, it ...
Joël Ouaknine, James Worrell
ASPLOS
1998
ACM
13 years 12 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
FORMATS
2006
Springer
13 years 11 months ago
On the Computational Power of Timed Differentiable Petri Nets
Abstract. Well-known hierarchies discriminate between the computational power of discrete time and space dynamical systems. A contrario the situation is more confused for dynamical...
Serge Haddad, Laura Recalde, Manuel Silva