386 search results - page 41 / 78 » Informing Memory Operations: Providing Memory Performance Fe... |
SIGMETRICS
1993
ACM
13 years 11 months ago
1993
ACM
Recently there has been a surge of interest in developing performance debugging tools to help programmers tune their applications for better memory performance [2, 4, 10]. These t...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
As the performance gap between processors and memory systems increases, the CPU spends more time stalled waiting for data from main memory. Critical long latency instructions, suc...
ICS
2003
Tsinghua U.
14 years 24 days ago
2003
Tsinghua U.
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
VLDB
2007
ACM
14 years 7 months ago
2007
ACM
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
IPPS
1998
IEEE
13 years 12 months ago
1998
IEEE
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...