386 search results - page 42 / 78 » Informing Memory Operations: Providing Memory Performance Fe... |
DAMON
2009
Springer
14 years 2 months ago
2009
Springer
Database processes must be cache-efficient to effectively utilize modern hardware. In this paper, we analyze the importance of temporal locality and the resultant cache behavior ...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
CIKM
2009
Springer
14 years 7 days ago
2009
Springer
During the last few years, GPUs have evolved from simple devices for the display signal preparation into powerful coprocessors that do not only support typical computer graphics t...
PPOPP
2003
ACM
14 years 25 days ago
2003
ACM
Simultaneous multithreading (SMT) represents a fundamental shift in processor capability. SMT's ability to execute multiple threads simultaneously within a single CPU offers ...