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» Inheritance of Temporal Logic Properties
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MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 5 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
JSC
2010
100views more  JSC 2010»
13 years 5 months ago
An invariant-based approach to the verification of asynchronous parameterized networks
A uniform verification problem for parameterized systems is to determine whether a temporal property is satisfied for every instance of the system which is composed of an arbitrar...
Igor V. Konnov, Vladimir A. Zakharov
JOT
2007
169views more  JOT 2007»
13 years 11 months ago
Translating AUML Diagrams into Maude Specifications: A Formal Verification of Agents Interaction Protocols
Agents Interaction Protocols (AIPs) play a crucial role in multi-agents systems development. They allow specifying sequences of messages between agents. Major proposed protocols s...
Farid Mokhati, Noura Boudiaf, Mourad Badri, Linda ...
ISCIS
2004
Springer
14 years 4 months ago
Semi-formal and Formal Models Applied to Flexible Manufacturing Systems
Abstract. Flexible Manufacturing Systems (FMSs) are adopted to process different goods in different mix ratios allowing firms to react quickly and efficiently to changes in produ...
Andrea Matta, Carlo A. Furia, Matteo Rossi
CODES
2002
IEEE
14 years 4 months ago
Symbolic model checking of Dual Transition Petri Nets
This paper describes the formal verification of the recently introduced Dual Transition Petri Net (DTPN) models [12], using model checking techniques. The methodology presented a...
Mauricio Varea, Bashir M. Al-Hashimi, Luis Alejand...