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MICRO
2008
IEEE
138views Hardware» more  MICRO 2008»
14 years 3 months ago
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs
As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical...
Xi E. Chen, Tor M. Aamodt
FPGA
2007
ACM
122views FPGA» more  FPGA 2007»
14 years 3 months ago
The shunt: an FPGA-based accelerator for network intrusion prevention
Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
Nicholas Weaver, Vern Paxson, José M. Gonz&...
GLOBECOM
2006
IEEE
14 years 3 months ago
Modelling the Impact of User Mobility on the Throughput in Networks of Wireless 802.11 LANs
— The wireless LAN technology 802.11, also called Wi-Fi, offers high speed wireless Internet access for local area environments. WLANs provide much higher data rates than the mob...
Sandjai Bhulai, Robert D. van der Mei, Taoying Yua...
IEEEPACT
2006
IEEE
14 years 3 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan
IUI
2006
ACM
14 years 3 months ago
A hybrid learning system for recognizing user tasks from desktop activities and email messages
The TaskTracer system seeks to help multi-tasking users manage the resources that they create and access while carrying out their work activities. It does this by associating with...
Jianqiang Shen, Lida Li, Thomas G. Dietterich, Jon...