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DFT
2006
IEEE
125views VLSI» more  DFT 2006»
14 years 3 months ago
Synthesis of Efficient Linear Test Pattern Generators
This paper presents a procedure for Synthesis of LINear test pattern Generators called SLING. SLING can synthesize linear test pattern generators that satisfy constraints on area,...
Avijit Dutta, Nur A. Touba
VLSID
2000
IEEE
102views VLSI» more  VLSID 2000»
14 years 1 months ago
Inductance Characterization of Small Interconnects Using Test-Signal Method
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
Jeegar Tilak Shah, Madhav P. Desai, Sugata Sanyal
CSO
2009
IEEE
14 years 3 months ago
Association Rules Based Data Mining on Test Data of Physical Health Standard
With the development of modern electronic and computer technologies, sports training and competition became more and more technical. A great deal of data were recorded, including ...
Lan Yu
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
14 years 2 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
TSE
2010
155views more  TSE 2010»
13 years 3 months ago
Incremental Test Generation for Software Product Lines
Recent advances in mechanical techniques for systematic testing have increased our ability to automatically find subtle bugs, and hence to deploy more dependable software. This pap...
Engin Uzuncaova, Sarfraz Khurshid, Don S. Batory