174 search results - page 14 / 35 » Instruction Fetch Mechanisms for Multipath Execution Process... |
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
DAC
2012
ACM
11 years 10 months ago
2012
ACM
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
JILP
2000
13 years 7 months ago
2000
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottlen...
MICRO
2002
IEEE
14 years 12 days ago
2002
IEEE
In a 64-bit processor, many of the data values actually used in computations require much narrower data-widths. In this study, we demonstrate that instruction data-widths exhibit ...