174 search results - page 21 / 35 » Instruction Fetch Mechanisms for Multipath Execution Process... |
IEEEPACT
2003
IEEE
14 years 23 days ago
2003
IEEE
Simultaneous multithreading (SMT) increases processor throughput by multiplexing resources among several threads. Despite the commercial availability of SMT processors, several as...
ICS
2004
Tsinghua U.
14 years 26 days ago
2004
Tsinghua U.
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...
TDSC
2010
13 years 2 months ago
2010
We describe Instruction-Set Randomization (ISR), a general approach for safeguarding systems against any type of code-injection attack. We apply Kerckhoffs' principle to creat...
ASPDAC
2000
ACM
13 years 11 months ago
2000
ACM
The paper presents an application specific Java processor including reconfigurabilities, which is a DLX like pipeline processor with 5 stages and executes Java byte codes directly....
SP
2010
IEEE
13 years 11 months ago
2010
IEEE
Abstract—Most security mechanisms proposed to date unquestioningly place trust in microprocessor hardware. This trust, however, is misplaced and dangerous because microprocessors...