1192 search results - page 15 / 239 » Instruction Level Distributed Processing |
IEEEPACT
2009
IEEE
14 years 1 months ago
2009
IEEE
With advances in hardware, instruction set architectures are undergoing continual evolution. As a result, compilers are under constant pressure to adapt and take full advantage of...
KIVS
2009
Springer
14 years 1 months ago
2009
Springer
We present an integrated approach for supporting in-network sensor data processing in dynamic and heterogeneous sensor networks. The concept relies on data stream processing techni...
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
IPPS
2003
IEEE
14 years 8 hour ago
2003
IEEE
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
SPAA
2006
ACM
14 years 20 days ago
2006
ACM
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...