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» Instruction Level Distributed Processing
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ICS
2004
Tsinghua U.
14 years 3 days ago
Scaling the issue window with look-ahead latency prediction
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...
Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, Gl...
EUROPAR
1999
Springer
13 years 11 months ago
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors
Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high perform...
Daniel A. Connors, Jean-Michel Puiatti, David I. A...
ICPP
2009
IEEE
13 years 4 months ago
Thread Merging Schemes for Multithreaded Clustered VLIW Processors
Several multithreading techniques have been proposed to reduce the resource underutilization in Very Long Instruction Word (VLIW) processors. Simultaneous MultiThreading (SMT) is ...
Manoj Gupta, Fermín Sánchez, Josep L...
ICS
2009
Tsinghua U.
14 years 1 months ago
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
Polychronis Xekalakis, Nikolas Ioannou, Marcelo Ci...
UIST
1996
ACM
13 years 11 months ago
Language-Level Support for Exploratory Programming of Distributed Virtual Environments
We describe COTERIE, a toolkit that provides languagelevel support for building distributed virtual environments. COTERIE is based on the distributed data-object paradigm for dist...
Blair MacIntyre, Steven Feiner