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MDM
2007
Springer
195views Communications» more  MDM 2007»
14 years 27 days ago
BORA: Routing and Aggregation for Distributed Processing of Spatio-Temporal Range Queries
This work tackles the problem of answer-aggregation for continuous spatio-temporal range queries in distributed settings. We assume a grid-like coverage of the spatial universe of...
Goce Trajcevski, Hui Ding, Peter Scheuermann, Isab...
IPPS
2007
IEEE
14 years 1 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
14 years 1 months ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...
LCTRTS
2004
Springer
14 years 4 days ago
Feedback driven instruction-set extension
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
MASCOTS
2010
13 years 8 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...