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IPPS
2002
IEEE
14 years 10 days ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
EUROPAR
1997
Springer
13 years 11 months ago
Shared vs. Snoop: Evaluation of Cache Structure for Single-Chip Multiprocessors
The shared cache structures and snoop cache structures for single-chip multiprocessors are evaluated and compared using an instruction level simulator. Simulation results show that...
Toru Kisuki, Masaki Wakabayashi, Junji Yamamoto, K...
EUROPAR
2006
Springer
13 years 11 months ago
Analysis of the Memory Registration Process in the Mellanox InfiniBand Software Stack
Abstract. To leverage high speed interconnects like InfiniBand it is important to minimize the communication overhead. The most interfering overhead is the registration of communic...
Frank Mietke, Robert Rex, Robert Baumgartl, Torste...
CCGRID
2009
IEEE
14 years 2 months ago
Improving Parallel Write by Node-Level Request Scheduling
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
ELPUB
2006
ACM
14 years 1 months ago
Modelling a Layer for Real-Time Management of Interactions in Web Based Distance Learning
In the last few years, the University of Aveiro, Portugal, has been offering several distance learning courses over the Web, using e-learning platforms. Experience showed that dif...
Carlos Sousa Pinto, Fernando M. S. Ramos