1192 search results - page 36 / 239 » Instruction Level Distributed Processing |
WSC
1998
13 years 11 months ago
1998
The current structure of the High Level Architecture (HLA) puts a tremendous burden on network load and CPU utilization for large distributed simulations due to its limited contro...
ISPAN
1997
IEEE
14 years 2 months ago
1997
IEEE
Loop unrolling is one of the most promising parallelization techniques, because the nature of programs causes most of the processing time to be spent in their loops. Unrolling not...
HPCA
2005
IEEE
14 years 10 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
MM
2006
ACM
14 years 3 months ago
2006
ACM
We present a framework to synchronize pop music to corresponding text lyric. We refine line level alignment achievable by existing work to syllabic level by using a dynamic progra...
EMNLP
2010
13 years 7 months ago
2010
Part-of-speech (POS) tag distributions are known to exhibit sparsity -- a word is likely to take a single predominant tag in a corpus. Recent research has demonstrated that incorp...