1192 search results - page 4 / 239 » Instruction Level Distributed Processing |
HPCC
2009
Springer
13 years 11 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
ACL
2010
13 years 4 months ago
2010
In this paper, we address the task of mapping high-level instructions to sequences of commands in an external environment. Processing these instructions is challenging--they posit...
ICPPW
2006
IEEE
14 years 20 days ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
PLDI
2000
ACM
13 years 11 months ago
2000
ACM
Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes pri...
CONNECTION
2006
13 years 6 months ago
2006
We present an approach for recognition and clustering of spatio temporal patterns based on networks of spiking neurons with active dendrites and dynamic synapses. We introduce a n...