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102
Voted
ISCA
1993
IEEE
113views Hardware» more  ISCA 1993»
15 years 6 months ago
A Comparison of Dynamic Branch Predictors that Use Two Levels of Branch History
Recent attention to speculative execution as a mechanism for increasing performance of single instruction streams has demanded substantially better branch prediction than what has...
Tse-Yu Yeh, Yale N. Patt
98
Voted
JCIT
2007
84views more  JCIT 2007»
15 years 2 months ago
Using Educational Technology to Attain English-Level Inclusion for Asian Business/Technology Students
Just about if not every Native English Speaking Teacher (NEST) in Korea has faced the situation of having to accommodate students with varying, sometimes to dramatic degrees, leve...
David W. Deeds
LCN
2006
IEEE
15 years 8 months ago
Efficient Packet Processing in User-Level OSes: A Study of UML
Network server consolidation has become popular through recent virtualization technology that builds secure, isolated network systems on shared hardware. One of the virtualization...
Younggyun Koh, Calton Pu, Sapan Bhatia, Charles Co...
ASPDAC
1995
ACM
79views Hardware» more  ASPDAC 1995»
15 years 6 months ago
Search space reduction in high level synthesis by use of an initial circuit
Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
Atsushi Masuda, Hiroshi Imai, Jeffery P. Hansen, M...
DIMVA
2006
15 years 4 months ago
Network-Level Polymorphic Shellcode Detection Using Emulation
Abstract. As state-of-the-art attack detection technology becomes more prevalent, attackers are likely to evolve, employing techniques such as polymorphism and metamorphism to evad...
Michalis Polychronakis, Kostas G. Anagnostakis, Ev...