2784 search results - page 113 / 557 » Instruction Level Parallelism |
ISCA
2003
IEEE
15 years 8 months ago
2003
IEEE
As processor back-ends get more aggressive, front-ends will have to scale as well. Although the back-ends of superscalar processors have continued to become more parallel, the fro...
142
click to vote
ICPR
2000
IEEE
15 years 7 months ago
2000
IEEE
This paper describes an infrastructure that enables transparent development of image processing software for parallel computers. The infrastructure’s main component is an image ...
101
Voted
ICPP
1999
IEEE
15 years 7 months ago
1999
IEEE
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...
117
click to vote
EUROPAR
1998
Springer
15 years 6 months ago
1998
Springer
Instruction Balanced Time Slicing IBTS allows multiple parallel jobs to be scheduled in a manner akin to the well-known gang scheduling scheme in parallel computers. IBTS however a...
81
Voted
CASCON
1996
15 years 4 months ago
1996
The trend in workstation hardware is towards symmetric shared-memory multiprocessors (SMPs). User expectations are for (largely) automatic exploitation of parallelismon an SMP, si...