Sciweavers

2784 search results - page 47 / 557
» Instruction Level Parallelism
Sort
View
ICPP
2002
IEEE
14 years 2 months ago
Out-of-Order Instruction Fetch Using Multiple Sequencers
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...
Paramjit S. Oberoi, Gurindar S. Sohi
ASPDAC
2000
ACM
83views Hardware» more  ASPDAC 2000»
14 years 2 months ago
A new approach to assembly software retargeting for microcontrollers
A new approach is proposed to translate existing software programs from one instruction set to other instruction sets at the level. The behaviors of instructions are abstractly re...
Ing-Jer Huang, Dao-Zhen Chen