2784 search results - page 51 / 557 » Instruction Level Parallelism |
LCPC
1998
Springer
14 years 2 months ago
1998
Springer
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
RELMICS
2005
Springer
14 years 3 months ago
2005
Springer
Abstract. As part of a larger project, we have built a declarative assembly language that enables us to specify multiple code paths to compute particular quantities, giving the ins...
ISPAN
2000
IEEE
14 years 2 months ago
2000
IEEE
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
IEEEPACT
2007
IEEE
14 years 4 months ago
2007
IEEE
Performance auditing is an online optimization strategy that empirically measures the effectiveness of an optimization on a particular code region. It has the potential to greatly...