2784 search results - page 52 / 557 » Instruction Level Parallelism |
99
Voted
COMPCON
1996
IEEE
15 years 6 months ago
1996
IEEE
An important objective of the MicroUnity mediaprocessor is to allow the design of systems that replace hardwired functionality with software. One of the key design techniques that...
128
Voted
TPDS
2010
15 years 22 days ago
2010
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
106
Voted
HPCA
2008
IEEE
16 years 2 months ago
2008
IEEE
Serializing instructions (SIs), such as writes to control registers, have many complex dependencies, and are difficult to execute out-of-order (OoO). To avoid unnecessary complexi...
105
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SPAA
2003
ACM
15 years 7 months ago
2003
ACM
Recent research on processor microarchitecture suggests using instruction criticality as a metric to guide hardware control policies. Fields et al. [3, 4] have proposed a directed...
118
Voted
DAGSTUHL
2007
15 years 3 months ago
2007
: This is a position paper introducing blob computing: A Blob is a generic primitive used to structure a uniform computing substrate into an easier-to-program parallel virtual mach...