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LCPC
2005
Springer
15 years 8 months ago
Automatic Measurement of Instruction Cache Capacity
There is growing interest in autonomic computing systems that can optimize their own behavior on different platforms without manual intervention. Examples of successful self-opti...
Kamen Yotov, Sandra Jackson, Tyler Steele, Keshav ...
CONNECTION
2006
172views more  CONNECTION 2006»
15 years 2 months ago
Temporal sequence detection with spiking neurons: towards recognizing robot language instructions
We present an approach for recognition and clustering of spatio temporal patterns based on networks of spiking neurons with active dendrites and dynamic synapses. We introduce a n...
Christo Panchev, Stefan Wermter
IEEEPACT
2005
IEEE
15 years 8 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
ASPLOS
1989
ACM
15 years 6 months ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
USENIX
1993
15 years 3 months ago
The Nachos Instructional Operating System
In teaching operating systems at an undergraduate level, we believe that it is important to provide a project that is realistic enough to show how real operating systems work, yet...
Wayne A. Christopher, Steven J. Procter, Thomas E....