2784 search results - page 95 / 557 » Instruction Level Parallelism |
213
Voted
ICDCN
2011
Springer
14 years 6 months ago
2011
Springer
Distributed processing of real-world graphs is challenging due to their size and the inherent irregular structure of graph computations. We present HIPG, a distributed framework th...
124
Voted
IPCCC
2006
IEEE
15 years 8 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
106
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CCGRID
2001
IEEE
15 years 6 months ago
2001
IEEE
TACO (Topologies and Collections) is a template library that introduces the flavour of distributed data parallel processing by means of reusable topology classes and C++ s. This p...
148
Voted
DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
106
Voted
CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
In this paper, we present a general and an efficient algorithm for automatic selection of new application-specific instructions under hardware resources constraints. The instructi...