2784 search results - page 98 / 557 » Instruction Level Parallelism |
89
Voted
DSD
2003
IEEE
15 years 7 months ago
2003
IEEE
The Logarithmic Number System (LNS) is an alternative to IEEE-754 standard floating-point arithmetic. LNS multiply, divide and square root are easier than IEEE-754 and naturally ...
111
Voted
MICRO
1999
IEEE
15 years 6 months ago
1999
IEEE
Branch mispredictions are a major obstacle to exploiting instruction-level parallelism, at least in part because all instructions after a mispredicted branch are squashed. However...
95
Voted
ISCA
1997
IEEE
15 years 6 months ago
1997
IEEE
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
139
Voted
JSSPP
2009
Springer
15 years 9 months ago
2009
Springer
Abstract. As multi-core processors proliferate, it has become more important than ever to ensure efficient execution of parallel jobs on multiprocessor systems. In this paper, we s...
112
Voted
ACL
2012
13 years 5 months ago
2012
The lack of parallel corpora and linguistic resources for many languages and domains is one of the major obstacles for the further advancement of automated translation. A possible...