113 search results - page 16 / 23 » Instruction Scheduling Based on Subgraph Isomorphism for a H... |
COMPUTER
2002
13 years 7 months ago
2002
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
MICRO
2002
IEEE
14 years 12 days ago
2002
IEEE
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
IEEEINTERACT
2003
IEEE
14 years 23 days ago
2003
IEEE
: The traditional framework for back-end compilation is based on the scope of functions, which is a natural boundary to partition an entire program for compilation. However, the si...
EUROSYS
2010
ACM
14 years 4 months ago
2010
ACM
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
NOSSDAV
2005
Springer
14 years 1 months ago
2005
Springer
Multimedia applications today constitute a significant fraction of the workload running on portable devices such as mobile phones, PDAs and MP3 players. However, the processors i...