113 search results - page 16 / 23 » Instruction Scheduling Based on Subgraph Isomorphism for a H... |
128
Voted
COMPUTER
2002
15 years 3 months ago
2002
tail defines the level of abstraction used to implement the model's components. A highly detailed model will faithfully simulate all aspects of machine operation, whether or n...
130
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MICRO
2002
IEEE
15 years 8 months ago
2002
IEEE
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
137
Voted
IEEEINTERACT
2003
IEEE
15 years 8 months ago
2003
IEEE
: The traditional framework for back-end compilation is based on the scope of functions, which is a natural boundary to partition an entire program for compilation. However, the si...
105
Voted
EUROSYS
2010
ACM
16 years 18 days ago
2010
ACM
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
138
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NOSSDAV
2005
Springer
15 years 9 months ago
2005
Springer
Multimedia applications today constitute a significant fraction of the workload running on portable devices such as mobile phones, PDAs and MP3 players. However, the processors i...