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IPPS
2005
IEEE
14 years 1 months ago
Configuration Steering for a Reconfigurable Superscalar Processor
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Brian F. Veale, John K. Antonio, Monte P. Tull
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
13 years 5 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
GECCO
2008
Springer
122views Optimization» more  GECCO 2008»
13 years 9 months ago
Evolving machine microprograms
The realization of a control unit can be done using a complex circuitry or microprogramming. The latter may be considered as an alternative method of implementation of machine ins...
Pedro A. Castillo Valdivieso, G. Fernández,...
INFOCOM
2002
IEEE
14 years 26 days ago
Scheduling Processing Resources in Programmable Routers
—To provide flexibility in deploying new protocols and services, general-purpose processing engines are being placed in the datapath of routers. Such network processors are typi...
Prashanth Pappu, Tilman Wolf
IEEEPACT
2006
IEEE
14 years 1 months ago
Adaptive reorder buffers for SMT processors
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev