138 search results - page 17 / 28 » Instruction Scheduling and Executable Editing |
CF
2004
ACM
14 years 1 months ago
2004
ACM
Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
ICTAI
2007
IEEE
14 years 2 months ago
2007
IEEE
Constraint satisfaction and propositional satisfiability problems are often solved using backtracking search. Previous studies have shown that portfolios of backtracking algorith...
ICASSP
2008
IEEE
14 years 2 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Modern embedded CPU systems rely on a growing number of software features, but this growth increases the memory footprint and increases the need for efficient instruction and data...
RTAS
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper discusses an approach for supporting soft realtime periodic tasks in Linux on performance asymmetric multicore platforms (AMPs). Such architectures consist of a large n...