32 search results - page 4 / 7 » Instruction trace compression for rapid instruction cache si... |
IISWC
2008
IEEE
14 years 1 months ago
2008
IEEE
Dynamic binary translation systems enable a wide range of applications such as program instrumentation, optimization, and security. DBTs use a software code cache to store previou...
ICS
2001
Tsinghua U.
13 years 11 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
ASYNC
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...
ISCA
2000
IEEE
13 years 11 months ago
2000
IEEE
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
CGO
2007
IEEE
14 years 1 months ago
2007
IEEE
Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to atta...