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ICCAD
2000
IEEE
95views Hardware» more  ICCAD 2000»
14 years 2 months ago
Test of Future System-on-Chips
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...
Yervant Zorian, Sujit Dey, Mike Rodgers
APSEC
2000
IEEE
14 years 1 months ago
A GUI and testing tool for SOFL
SOFL is a formal language and method for system specification and design. As a language it is an integration of Petri nets, Data Flow Diagrams, and VDM-SL. As a method it is a com...
Shaoying Liu, Tetsuo Fukuzaki, Koji Miyamoto
MKWI
2008
147views Business» more  MKWI 2008»
13 years 11 months ago
Process-oriented Test Automation of Configurable Business Solutions
: Along with rapidly changing market requirements for service-oriented business software new challenges for quality management, quality assurance, and testing arise. Customers must...
Benjamin Blau, Hong Tuan Kiet Vo
RSP
2007
IEEE
139views Control Systems» more  RSP 2007»
14 years 4 months ago
Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring, and Automatic Test Generation
This paper addresses the need for formal specification and runtime verification of system-level requirements of distributed reactive systems. It describes a formalism for specifyi...
Doron Drusinsky, Man-tak Shing
FMICS
2006
Springer
14 years 1 months ago
Test Coverage for Loose Timing Annotations
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
Claude Helmstetter, Florence Maraninchi, Laurent M...