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» Integrating Temporal Logics
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ICTAI
2003
IEEE
14 years 29 days ago
An Intelligent Early Warning System for Software Quality Improvement and Project Management
One of the main reasons behind unfruitful software development projects is that it is often too late to correct the problems by the time they are detected. It clearly indicates th...
Xiaoqing Frank Liu, Gautam Kane, Monu Bambroo
RSP
2003
IEEE
169views Control Systems» more  RSP 2003»
14 years 28 days ago
Rapid Prototyping and Incremental Evolution Using SLAM
The paper shows the outlines of the SLAM system and how its design is suitable for automating rapid prototyping. The system includes a very expressive object oriented specificati...
Ángel Herranz-Nieva, Juan José Moren...
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 28 days ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
SLIP
2003
ACM
14 years 28 days ago
Error-correction and crosstalk avoidance in DSM busses
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
Ketan N. Patel, Igor L. Markov
FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
14 years 27 days ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...