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GLVLSI
2003
IEEE
166views VLSI» more  GLVLSI 2003»
14 years 3 months ago
Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe
HICSS
2003
IEEE
165views Biometrics» more  HICSS 2003»
14 years 3 months ago
The Birth of An E-Business System Architecture: Conflicts, Compromises, and Gaps in Methods
This paper describes the system architecture development process in an international ICT company, which is building a comprehensive e-business system for its customers. The implem...
Kari Smolander
ISCAS
2003
IEEE
119views Hardware» more  ISCAS 2003»
14 years 3 months ago
Simulated evolution algorithm for multiobjective VLSI netlist bi-partitioning
In this paper, the Simulated Evolution algorithm (SimE) is engineered to solve the optimization problem of multi-objective VLSI netlist bi-partitioning. The multi-objective versio...
Sadiq M. Sait, Aiman H. El-Maleh, Rush H. Al-Abuji
ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
14 years 3 months ago
Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanja...
ISQED
2003
IEEE
119views Hardware» more  ISQED 2003»
14 years 3 months ago
System and Framework for QA of Process Design Kits
In this paper, we evaluate the dependencies between tools, data and environment in process design kits, and present a framework for systematically analyzing the quality of the des...
M. C. Scott, M. O. Peralta, Jo Dale Carothers