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FPGA
2004
ACM
128views FPGA» more  FPGA 2004»
14 years 1 months ago
Incremental physical resynthesis for timing optimization
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi...
DAC
2006
ACM
14 years 1 months ago
Steiner network construction for timing critical nets
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
Shiyan Hu, Qiuyang Li, Jiang Hu, Peng Li
DBISP2P
2006
Springer
110views Database» more  DBISP2P 2006»
14 years 1 months ago
Reusing Classical Query Rewriting in P2P Databases
Sharing of structured data in P2P overlays is a challenging problem, especially in the absence of a global schema. The nature of structured data stored in the overlay enforces stri...
Verena Kantere, Timos K. Sellis
FMCAD
2006
Springer
14 years 1 months ago
Ario: A Linear Integer Arithmetic Logic Solver
Ario is a solver for systems of linear integer arithmetic logic. Such systems are commonly used in design verification applications and are classified under Satisfiability Modulo T...
Hossein M. Sheini, Karem A. Sakallah
AIPR
2001
IEEE
14 years 1 months ago
A Qualitative Image Reconstruction from an Axial Image Sequence
This paper presents a method to process axial monocular image sequences for mobile robot obstacle detection. We do not aim to achieve a complete scene reconstruction, but only to ...
Philippe Guermeur, Edwige Pissaloux