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DAC
1995
ACM
14 years 1 months ago
Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization
Abstract—With delays due to the physical interconnect dominating the overall logic path delays, circuit-level delay optimization must take interconnect effects into account. Inst...
Noel Menezes, Satyamurthy Pullela, Lawrence T. Pil...
HAPTICS
2007
IEEE
14 years 3 days ago
Experimental Evaluation of Attachment Methods for a Multifinger Haptic Device
Due to the nature of touch sensation, the interface between a user and a haptic device must be carefully designed and selected such that the user feels they are directly manipulat...
Regina Donlin, Rainer Leuschke, Blake Hannaford
SNPD
2008
13 years 11 months ago
Testing Component-Based Real Time Systems
This paper focuses on studying efficient solutions for modeling and deriving compositional tests for component-based real-time systems. In this work, we propose a coherent framewo...
Rachid Bouaziz, Ismail Berrada
BIOCOMP
2006
13 years 11 months ago
Petri Net Based Model Of The T Cell Receptor Signaling Pathway
Intracellular signaling pathways as well as the interactions and coordination that exist among them are complex and difficult to visualize and understand. Computer-based models of...
Srinidhi Jayasuryan, Anil Bamezai, Vijay Gehlot
WSPI
2004
13 years 11 months ago
Grounding Knowledge of Engineering Applications in Systematic Terms
In the main research of internet-computing enabled knowledge management, we use some of the most advanced research scenarios, arguing that we critically need a system approach to q...
Ying Liu 0002, Jin Yu