Sciweavers

2004 search results - page 352 / 401
» Interaction nets: programming language design and implementa...
Sort
View
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
16 years 11 days ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
147
Voted
VEE
2006
ACM
139views Virtualization» more  VEE 2006»
15 years 9 months ago
Vector LLVA: a virtual vector instruction set for media processing
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-speciï¬...
Robert L. Bocchino Jr., Vikram S. Adve
160
Voted
VEE
2005
ACM
203views Virtualization» more  VEE 2005»
15 years 9 months ago
Inlining java native calls at runtime
We introduce a strategy for inlining native functions into JavaTM applications using a JIT compiler. We perform further optimizations to transform inlined callbacks into semantica...
Levon Stepanian, Angela Demke Brown, Allan Kielstr...
IPPS
2002
IEEE
15 years 8 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
125
Voted
APL
1992
ACM
15 years 7 months ago
Compiler Tools in APL
We present the design and implementation of APL Intrinsic Functions for a Finite State Machine (also known as a Finite State Automaton) which recognizes regular languages, and a P...
Robert Bernecky, Gert Osterburg