816 search results - page 52 / 164 » Interconnect design methods for memory design |
SBCCI
2005
ACM
14 years 1 months ago
2005
ACM
Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumpti...
VLSID
2001
IEEE
14 years 8 months ago
2001
IEEE
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
VTC
2007
IEEE
14 years 1 months ago
2007
IEEE
— We design a coding scheme for Costa’s dirty paper coding (DPC) [6] using a channel and a shaping code. We show that by transforming the channel noise distribution the DPC cha...
ICIP
2007
IEEE
2007
IEEE
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
14 years 9 months ago
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
CHI
2008
ACM
14 years 8 months ago
2008
ACM
A significant fraction of persons with cognitive disabilities are potentially able to live more independently with the use of powerful tools embedded in their social environment. ...