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» Interconnect design methods for memory design
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ASAP
2005
IEEE
104views Hardware» more  ASAP 2005»
14 years 2 months ago
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
Andy Lambrechts, Praveen Raghavan, Anthony Leroy, ...
CF
2004
ACM
14 years 2 months ago
A first glance at Kilo-instruction based multiprocessors
The ever increasing gap between processor and memory speed, sometimes referred to as the Memory Wall problem [42], has a very negative impact on performance. This mismatch will be...
Marco Galluzzi, Valentin Puente, Adrián Cri...
GECCO
2009
Springer
150views Optimization» more  GECCO 2009»
13 years 6 months ago
Parallel shared memory strategies for ant-based optimization algorithms
This paper describes a general scheme to convert sequential ant-based algorithms into parallel shared memory algorithms. The scheme is applied to an ant-based algorithm for the ma...
Thang Nguyen Bui, ThanhVu H. Nguyen, Joseph R. Riz...
VLSID
2005
IEEE
100views VLSI» more  VLSID 2005»
14 years 9 months ago
A Fast Buffered Routing Tree Construction Algorithm under Accurate Delay Model
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
Yibo Wang, Yici Cai, Xianlong Hong
ICCAD
2002
IEEE
106views Hardware» more  ICCAD 2002»
14 years 5 months ago
Throughput-driven IC communication fabric synthesis
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...
Tao Lin, Lawrence T. Pileggi