731 search results - page 90 / 147 » Interconnect modeling for improved system-level design optim... |
ISCA
2006
IEEE
13 years 8 months ago
2006
IEEE
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
PE
2007
Springer
13 years 8 months ago
2007
Springer
This paper develops time-based rejuvenation policies to improve the performability measures of a cluster system. Three rejuvenation policies, namely standard rejuvenation, delayed...
CASES
2005
ACM
13 years 10 months ago
2005
ACM
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
IEEEPACT
2007
IEEE
14 years 3 months ago
2007
IEEE
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
ISPAN
2002
IEEE
14 years 1 months ago
2002
IEEE
Abstract— In this paper, we propose an ontology specification for JavaBean programs, the object component model of Java. Our specification is written using the DAML+OIL languag...