30 search results - page 2 / 6 » Interconnect-Aware Coherence Protocols for Chip Multiprocess... |
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
Ring interconnects may be an attractive solution for future chip multiprocessors because they can enable faster links than buses and simpler switches than arbitrary switched inter...
CDES
2008
13 years 9 months ago
2008
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
NOCS
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
TPDS
2010
13 years 2 months ago
2010
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...