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112
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ASPDAC
2007
ACM
131views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign
Deep submicron effects drive the complication in designing chips, as well as in package designs and communications between package and board. As a result, the iterative interface d...
Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen
106
Voted
IMC
2003
ACM
15 years 8 months ago
Network performance monitoring at small time scales
SNMP statistics are usually collected over intervals of 5 minutes and correspond to average activity of IP links and network elements for the duration of the interval. Nevertheles...
Konstantina Papagiannaki, Rene L. Cruz, Christophe...
ACSC
2005
IEEE
15 years 9 months ago
A Novel Fuzzy Logic Controller (FLC) for Shortening the TCP Channel Roundtrip Time by Eliminating User Buffer Overflow Adaptivel
The proposed Fuzzy Logic Controller (FLC) is a novel approach for dynamic buffer tuning at the user/server level. It eliminates buffer overflow by ensuring that the buffer length ...
Wilfred W. K. Lin, Allan K. Y. Wong, Tharam S. Dil...
95
Voted
WWW
2001
ACM
16 years 4 months ago
An admission control scheme for predictable server response time for web accesses
Xiangping Chen, Prasant Mohapatra, Huamin Chen