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CF
2010
ACM
14 years 19 days ago
Enabling a highly-scalable global address space model for petascale computing
Over the past decade, the trajectory to the petascale has been built on increased complexity and scale of the underlying parallel architectures. Meanwhile, software developers hav...
Vinod Tipparaju, Edoardo Aprà, Weikuan Yu, ...
MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
13 years 11 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
ESOP
2006
Springer
13 years 11 months ago
Haskell Is Not Not ML
We present a typed calculus IL ("intermediate language") which supports the embedding of ML-like (strict, eager) and Haskell-like (non-strict, lazy) languages, without fa...
Ben Rudiak-Gould, Alan Mycroft, Simon L. Peyton Jo...
MSE
2005
IEEE
137views Hardware» more  MSE 2005»
14 years 1 months ago
Teaching SoC Design in a Project-Oriented Course Based on Robotics
The fast growing complexity and short time-tomarket of embedded systems designs, besides the great increase in capacity of today’s chips, are mobilizing the industry towards to ...
Abner Correa Barros, Pericles Lima, Juliana Xavier...
ECRTS
2009
IEEE
13 years 5 months ago
Generalized Tardiness Quantile Metric: Distributed DVS for Soft Real-Time Web Clusters
Performing QoS (Quality of Service) control in large computing systems requires an on line metric that is representative of the real state of the system. The Tardiness Quantile Me...
Luciano Bertini, Julius C. B. Leite, Daniel Moss&e...