108 search results - page 13 / 22 » Introspective 3D chips |
ISPD
2005
ACM
14 years 1 months ago
2005
ACM
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
BMCBI
2010
13 years 7 months ago
2010
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
CORR
2008
Springer
13 years 7 months ago
2008
Springer
Abstract-Two dimensional (2D) integration has been the traditional approach for IC integration. Increasing demands for providing electronic devices with superior performance and fu...
NOCS
2010
IEEE
13 years 6 months ago
2010
IEEE
—Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D IC technology, is motivated to achieve lower latency, lower power consumption, and higher ...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...