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ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
14 years 3 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 2 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
BMCBI
2010
162views more  BMCBI 2010»
13 years 10 months ago
Moara: a Java library for extracting and normalizing gene and protein mentions
Background: Gene/protein recognition and normalization are important preliminary steps for many biological text mining tasks, such as information retrieval, protein-protein intera...
Mariana L. Neves, José María Carazo,...
CORR
2007
Springer
117views Education» more  CORR 2007»
13 years 9 months ago
Perfectly Secure Steganography: Capacity, Error Exponents, and Code Constructions
An analysis of steganographic systems subject to the following perfect undetectability condition is presented in this paper. Following embedding of the message into the covertext,...
Ying Wang, Pierre Moulin
GLOBECOM
2010
IEEE
13 years 7 months ago
Space-Time Shift Keying: A Unified MIMO Architecture
In this paper, we propose a novel Space-Time Shift Keying (STSK) modulation scheme for MIMO communication systems, where the concept of spatial modulation is extended to include bo...
Shinya Sugiura, Sheng Chen, Lajos Hanzo