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ASPDAC
1999
ACM
113views Hardware» more  ASPDAC 1999»
14 years 3 months ago
An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
C. K. Eem, J. W. Chong
ALT
1998
Springer
14 years 3 months ago
Predictive Learning Models for Concept Drift
Concept drift means that the concept about which data is obtained may shift from time to time, each time after some minimum permanence. Except for this minimum permanence, the con...
John Case, Sanjay Jain, Susanne Kaufmann, Arun Sha...
ICDCS
1997
IEEE
14 years 3 months ago
Predictable Network Computing
Clusters of networked, off-the-shelf workstations are currently used for computationintensive, parallel applications. However, it is hardly possible to predict the timing behaviou...
Andreas Polze, Gerhard Fohler, Matthias Werner
HPCA
1996
IEEE
14 years 2 months ago
Register File Design Considerations in Dynamically Scheduled Processors
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
Keith I. Farkas, Norman P. Jouppi, Paul Chow
JSSPP
1997
Springer
14 years 2 months ago
Implications of I/O for Gang Scheduled Workloads
This paper examinestheimplicationsofgang schedulingfor generalpurpose multiprocessors. The workloads in these environments include both compute-bound parallel jobs, which often re...
Walter Lee, Matthew Frank, Victor Lee, Kenneth Mac...