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» Issues of the Automatic Generation of HPF Loop Programs
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ACSC
2004
IEEE
13 years 11 months ago
Automatic Derivation of Loop Termination Conditions to Support Verification
This paper introduces a repeatable and constructive approach to the analysis of loop progress and termination conditions in imperative programs. It is applicable to all loops for ...
Daniel Powell
FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
13 years 11 months ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
SC
1990
ACM
13 years 11 months ago
Loop distribution with arbitrary control flow
Loop distribution is an integral part of transforming a sequential program into a parallel one. It is used extensively in parallelization,vectorization, and memory management. For...
Ken Kennedy, Kathryn S. McKinley
POPL
2002
ACM
14 years 7 months ago
Predicate abstraction for software verification
e Abstraction for Software Verification Cormac Flanagan Shaz Qadeer Compaq Systems Research Center 130 Lytton Ave, Palo Alto, CA 94301 Software verification is an important and di...
Cormac Flanagan, Shaz Qadeer
ICS
2009
Tsinghua U.
14 years 2 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...