32 search results - page 4 / 7 » Iterative modulo scheduling: an algorithm for software pipel... |
CGO
2008
IEEE
14 years 2 months ago
2008
IEEE
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
EUROPAR
1997
Springer
13 years 12 months ago
1997
Springer
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
ICPP
2002
IEEE
14 years 19 days ago
2002
IEEE
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
LCPC
2009
Springer
14 years 8 days ago
2009
Springer
This paper improves our previous research effort [1] by providing an efficient method for kernel loop unrolling minimisation in the case of already scheduled loops, where circular...
CF
2005
ACM
13 years 9 months ago
2005
ACM
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...