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WSC
1998
13 years 9 months ago
Effective Implementation of Cycle Time Reduction Strategies for Semiconductor Back-end Manufacturing
Using discrete-event simulation models, a study was conducted to evaluate the current production practices of a high-volume semiconductor back-end operation. The overall goal was ...
Joerg Domaschke, Steven Brown, Jennifer Robinson, ...
ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
14 years 1 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
GLOBECOM
2008
IEEE
14 years 2 months ago
Global Optimal Routing, Scheduling and Power Control for Multi-Hop Wireless Networks with Interference
—We consider the problem of joint routing, scheduling and power control in multi-hop wireless networks. We use a linear relation between link capacity and signal to interference ...
Javad Kazemitabar, Vahid Tabatabaee, Hamid Jafarkh...
WWW
2008
ACM
14 years 8 months ago
Pagerank for product image search
In this paper, we cast the image-ranking problem into the task of identifying "authority" nodes on an inferred visual similarity graph and propose an algorithm to analyz...
Yushi Jing, Shumeet Baluja
ESCIENCE
2006
IEEE
14 years 1 months ago
Using Checkpointing to Enhance Turnaround Time on Institutional Desktop Grids
In this paper, we present a checkpoint-based scheme to improve the turnaround time of bag-of-tasks applications executed on institutional desktop grids. We propose to share checkp...
Patrício Domingues, Artur Andrzejak, Lu&iac...