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ICC
2008
IEEE
130views Communications» more  ICC 2008»
14 years 1 months ago
Managing Network Congestion with a Kohonen-Based RED Queue
— The behaviour of the TCP AIMD algorithm is known to cause queue length oscillations when congestion occurs at a router output link. Indeed, due to these queueing variations, en...
Emmanuel Lochin, Bruno Talavera
ISCAS
2008
IEEE
147views Hardware» more  ISCAS 2008»
14 years 1 months ago
Fast frequency acquisition all-digital PLL using PVT calibration
—Fast frequency acquisition is crucial for phase-locked loops (PLLs) used in portable devices, as on-chip clocks are frequently scaled down or up in order to manage power consump...
Hae-Soo Jeon, Duk-Hyun You, In-Cheol Park
EURODAC
1995
IEEE
182views VHDL» more  EURODAC 1995»
13 years 11 months ago
Delay modelling improvement for low voltage applications
Based on an explicit formulation of delays, an improved model for low voltage operation of CMOS inverter has been derived. Extrinsic and intrinsic effects, such as transistor curr...
Jean Michel Daga, Michel Robert, Daniel Auvergne
ICCD
1996
IEEE
134views Hardware» more  ICCD 1996»
13 years 11 months ago
Pausible Clocking: A First Step Toward Heterogeneous Systems
This paper describes a novel communication scheme, which is guaranteed to be free of synchronization failures, amongst multiple synchronous modules operating independently. In thi...
Kenneth Y. Yun, Ryan P. Donohue
DAC
2008
ACM
13 years 9 months ago
Topology synthesis of analog circuits based on adaptively generated building blocks
This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topo...
Angan Das, Ranga Vemuri