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ERSA
2010
199views Hardware» more  ERSA 2010»
13 years 5 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
MICRO
2005
IEEE
136views Hardware» more  MICRO 2005»
14 years 1 months ago
Automatic Thread Extraction with Decoupled Software Pipelining
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
Guilherme Ottoni, Ram Rangan, Adam Stoler, David I...
ANSS
2007
IEEE
14 years 2 months ago
JANE - The Java Ad Hoc Network Development Environment
This work describes a Java based development platform which is intended to support ad hoc network researchers in application and protocol design. Software development within this ...
Daniel Görgen, Hannes Frey, Christian Hiedels
WWW
2003
ACM
14 years 8 months ago
SweetDeal: representing agent contracts with exceptions using XML rules, ontologies, and process descriptions
SweetDeal is a rule-based approach to representation of business contracts that enables software agents to create, evaluate, negotiate, and execute contracts with substantial auto...
Benjamin N. Grosof, Terrence C. Poon
ATAL
2009
Springer
14 years 2 months ago
Operational semantics of goal models in adaptive agents
Several agent-oriented software engineering methodologies address the emerging challenges posed by the increasing need of adaptive software. A common denominator of such methodolo...
Mirko Morandini, Loris Penserini, Anna Perini